add new modules

This commit is contained in:
Michael Egger
2017-10-27 14:49:33 +02:00
parent d08f0fb3e4
commit 1ae4f7d312
21 changed files with 99429 additions and 0 deletions
+920
View File
@@ -0,0 +1,920 @@
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Siemens Matsushita Components B 45 194, B 45 197, B 45 198&lt;br&gt;
Source: www.farnell.com/datasheets/247.pdf</description>
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&lt;ul&gt;
&lt;li&gt;Motorola &lt;i&gt;CMOS LOGIC DATA&lt;/i&gt;; book, 02/88, DL131 REV 1
&lt;li&gt;http://www.elexp.com
&lt;li&gt;http://www.intersil.com
&lt;li&gt;http://www.ls3c.com.tw/product/1/COMOS.html
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<wire x1="-3.81" y1="3.175" x2="3.81" y2="3.175" width="0.254" layer="21"/>
<wire x1="3.81" y1="3.175" x2="3.81" y2="1.27" width="0.254" layer="21"/>
<wire x1="3.81" y1="1.27" x2="3.81" y2="-3.175" width="0.254" layer="21"/>
<wire x1="3.81" y1="-3.175" x2="-3.81" y2="-3.175" width="0.254" layer="21"/>
<wire x1="-3.81" y1="-3.175" x2="-3.81" y2="1.27" width="0.254" layer="21"/>
<wire x1="-3.81" y1="1.27" x2="-3.81" y2="3.175" width="0.254" layer="21"/>
<wire x1="-3.81" y1="1.27" x2="3.81" y2="1.27" width="0.254" layer="21"/>
<pad name="1" x="-2.54" y="0" drill="1" shape="long" rot="R90"/>
<pad name="2" x="0" y="0" drill="1" shape="long" rot="R90"/>
<pad name="3" x="2.54" y="0" drill="1" shape="long" rot="R90"/>
<text x="-3.81" y="3.81" size="1.016" layer="25" ratio="10">&gt;NAME</text>
<text x="-3.81" y="-5.08" size="1.016" layer="27" ratio="10">&gt;VALUE</text>
</package>
</packages>
</library>
</libraries>
<attributes>
</attributes>
<variantdefs>
</variantdefs>
<classes>
<class number="0" name="default" width="0" drill="0">
</class>
</classes>
<designrules name="default">
<description language="de">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
&lt;p&gt;
Die Standard-Design-Rules sind so gewählt, dass sie für
die meisten Anwendungen passen. Sollte ihre Platine
besondere Anforderungen haben, treffen Sie die erforderlichen
Einstellungen hier und speichern die Design Rules unter
einem neuen Namen ab.</description>
<description language="en">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
&lt;p&gt;
The default Design Rules have been set to cover
a wide range of applications. Your particular design
may have different requirements, so please make the
necessary adjustments and save your customized
design rules under a new name.</description>
<param name="layerSetup" value="(1*16)"/>
<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
<param name="mtIsolate" value="1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
<param name="mdWireWire" value="8mil"/>
<param name="mdWirePad" value="8mil"/>
<param name="mdWireVia" value="8mil"/>
<param name="mdPadPad" value="8mil"/>
<param name="mdPadVia" value="8mil"/>
<param name="mdViaVia" value="8mil"/>
<param name="mdSmdPad" value="8mil"/>
<param name="mdSmdVia" value="8mil"/>
<param name="mdSmdSmd" value="8mil"/>
<param name="mdViaViaSameLayer" value="8mil"/>
<param name="mnLayersViaInSmd" value="2"/>
<param name="mdCopperDimension" value="40mil"/>
<param name="mdDrill" value="8mil"/>
<param name="mdSmdStop" value="0mil"/>
<param name="msWidth" value="10mil"/>
<param name="msDrill" value="24mil"/>
<param name="msMicroVia" value="9.99mm"/>
<param name="msBlindViaRatio" value="0.5"/>
<param name="rvPadTop" value="0.25"/>
<param name="rvPadInner" value="0.25"/>
<param name="rvPadBottom" value="0.25"/>
<param name="rvViaOuter" value="0.25"/>
<param name="rvViaInner" value="0.25"/>
<param name="rvMicroViaOuter" value="0.25"/>
<param name="rvMicroViaInner" value="0.25"/>
<param name="rlMinPadTop" value="10mil"/>
<param name="rlMaxPadTop" value="20mil"/>
<param name="rlMinPadInner" value="10mil"/>
<param name="rlMaxPadInner" value="20mil"/>
<param name="rlMinPadBottom" value="10mil"/>
<param name="rlMaxPadBottom" value="20mil"/>
<param name="rlMinViaOuter" value="8mil"/>
<param name="rlMaxViaOuter" value="20mil"/>
<param name="rlMinViaInner" value="8mil"/>
<param name="rlMaxViaInner" value="20mil"/>
<param name="rlMinMicroViaOuter" value="4mil"/>
<param name="rlMaxMicroViaOuter" value="20mil"/>
<param name="rlMinMicroViaInner" value="4mil"/>
<param name="rlMaxMicroViaInner" value="20mil"/>
<param name="psTop" value="-1"/>
<param name="psBottom" value="-1"/>
<param name="psFirst" value="-1"/>
<param name="psElongationLong" value="100"/>
<param name="psElongationOffset" value="100"/>
<param name="mvStopFrame" value="1"/>
<param name="mvCreamFrame" value="0"/>
<param name="mlMinStopFrame" value="4mil"/>
<param name="mlMaxStopFrame" value="4mil"/>
<param name="mlMinCreamFrame" value="0mil"/>
<param name="mlMaxCreamFrame" value="0mil"/>
<param name="mlViaStopLimit" value="0mil"/>
<param name="srRoundness" value="0"/>
<param name="srMinRoundness" value="0mil"/>
<param name="srMaxRoundness" value="0mil"/>
<param name="slThermalIsolate" value="10mil"/>
<param name="slThermalsForVias" value="0"/>
<param name="dpMaxLengthDifference" value="10mm"/>
<param name="dpGapFactor" value="2.5"/>
<param name="checkGrid" value="0"/>
<param name="checkAngle" value="0"/>
<param name="checkFont" value="1"/>
<param name="checkRestrict" value="1"/>
<param name="useDiameter" value="13"/>
<param name="maxErrors" value="50"/>
</designrules>
<autorouter>
<pass name="Default">
<param name="RoutingGrid" value="50mil"/>
<param name="AutoGrid" value="1"/>
<param name="Efforts" value="0"/>
<param name="TopRouterVariant" value="1"/>
<param name="tpViaShape" value="round"/>
<param name="PrefDir.1" value="a"/>
<param name="PrefDir.2" value="0"/>
<param name="PrefDir.3" value="0"/>
<param name="PrefDir.4" value="0"/>
<param name="PrefDir.5" value="0"/>
<param name="PrefDir.6" value="0"/>
<param name="PrefDir.7" value="0"/>
<param name="PrefDir.8" value="0"/>
<param name="PrefDir.9" value="0"/>
<param name="PrefDir.10" value="0"/>
<param name="PrefDir.11" value="0"/>
<param name="PrefDir.12" value="0"/>
<param name="PrefDir.13" value="0"/>
<param name="PrefDir.14" value="0"/>
<param name="PrefDir.15" value="0"/>
<param name="PrefDir.16" value="a"/>
<param name="cfVia" value="8"/>
<param name="cfNonPref" value="5"/>
<param name="cfChangeDir" value="2"/>
<param name="cfOrthStep" value="2"/>
<param name="cfDiagStep" value="3"/>
<param name="cfExtdStep" value="0"/>
<param name="cfBonusStep" value="1"/>
<param name="cfMalusStep" value="1"/>
<param name="cfPadImpact" value="4"/>
<param name="cfSmdImpact" value="4"/>
<param name="cfBusImpact" value="0"/>
<param name="cfHugging" value="3"/>
<param name="cfAvoid" value="4"/>
<param name="cfPolygon" value="10"/>
<param name="cfBase.1" value="0"/>
<param name="cfBase.2" value="1"/>
<param name="cfBase.3" value="1"/>
<param name="cfBase.4" value="1"/>
<param name="cfBase.5" value="1"/>
<param name="cfBase.6" value="1"/>
<param name="cfBase.7" value="1"/>
<param name="cfBase.8" value="1"/>
<param name="cfBase.9" value="1"/>
<param name="cfBase.10" value="1"/>
<param name="cfBase.11" value="1"/>
<param name="cfBase.12" value="1"/>
<param name="cfBase.13" value="1"/>
<param name="cfBase.14" value="1"/>
<param name="cfBase.15" value="1"/>
<param name="cfBase.16" value="0"/>
<param name="mnVias" value="20"/>
<param name="mnSegments" value="9999"/>
<param name="mnExtdSteps" value="9999"/>
<param name="mnRipupLevel" value="10"/>
<param name="mnRipupSteps" value="100"/>
<param name="mnRipupTotal" value="100"/>
</pass>
<pass name="Follow-me" refer="Default" active="yes">
</pass>
<pass name="Busses" refer="Default" active="yes">
<param name="cfNonPref" value="4"/>
<param name="cfBusImpact" value="4"/>
<param name="cfHugging" value="0"/>
<param name="mnVias" value="0"/>
</pass>
<pass name="Route" refer="Default" active="yes">
</pass>
<pass name="Optimize1" refer="Default" active="yes">
<param name="cfVia" value="99"/>
<param name="cfExtdStep" value="10"/>
<param name="cfHugging" value="1"/>
<param name="mnExtdSteps" value="1"/>
<param name="mnRipupLevel" value="0"/>
</pass>
<pass name="Optimize2" refer="Optimize1" active="yes">
<param name="cfNonPref" value="0"/>
<param name="cfChangeDir" value="6"/>
<param name="cfExtdStep" value="0"/>
<param name="cfBonusStep" value="2"/>
<param name="cfMalusStep" value="2"/>
<param name="cfPadImpact" value="2"/>
<param name="cfSmdImpact" value="2"/>
<param name="cfHugging" value="0"/>
</pass>
<pass name="Optimize3" refer="Optimize2" active="yes">
<param name="cfChangeDir" value="8"/>
<param name="cfPadImpact" value="0"/>
<param name="cfSmdImpact" value="0"/>
</pass>
<pass name="Optimize4" refer="Optimize3" active="yes">
<param name="cfChangeDir" value="25"/>
</pass>
</autorouter>
<elements>
<element name="C10" library="rcl" package="SMC_B" value="" x="20.32" y="85.09" rot="R180"/>
<element name="C12" library="rcl" package="SMC_B" value="" x="20.32" y="74.93" rot="R180"/>
<element name="C13" library="rcl" package="C0805" value="100n" x="99.3775" y="83.5025"/>
<element name="C14" library="rcl" package="C0805" value="100n" x="99.3775" y="75.2475" rot="R180"/>
<element name="CTL1" library="wirepad" package="3,17/1,1" value="" x="76.2" y="60.96"/>
<element name="CTL2" library="wirepad" package="3,17/1,1" value="" x="52.07" y="60.96"/>
<element name="CTL3" library="wirepad" package="3,17/1,1" value="" x="26.67" y="60.96"/>
<element name="IC1" library="40xx" package="SO16" value="4053D" x="68.58" y="78.74" rot="R270"/>
<element name="IC2" library="40xx" package="SO16" value="4053D" x="45.72" y="78.74" rot="R270"/>
<element name="INPUT" library="wirepad" package="3,17/1,1" value="" x="92.075" y="73.9775"/>
<element name="INSERT1" library="wirepad" package="3,17/1,1" value="" x="80.645" y="66.04"/>
<element name="INSERT2" library="wirepad" package="3,17/1,1" value="" x="56.1975" y="66.04"/>
<element name="INSERT3" library="wirepad" package="3,17/1,1" value="" x="30.48" y="66.04"/>
<element name="OUT" library="anyma-lib" package="SO08" value="MAX4392ESA" x="99.3775" y="79.375" rot="R270"/>
<element name="OUTPUT" library="wirepad" package="3,17/1,1" value="" x="110.49" y="72.39"/>
<element name="R1" library="rcl" package="R1206" value="15k" x="23.8125" y="60.6425" rot="R90"/>
<element name="R2" library="rcl" package="R1206" value="15k" x="56.1975" y="59.3725" rot="R180"/>
<element name="R3" library="rcl" package="R1206" value="75" x="109.855" y="80.01"/>
<element name="R4" library="rcl" package="R1206" value="15k" x="73.025" y="60.325" rot="R90"/>
<element name="RETURN1" library="wirepad" package="3,17/1,1" value="" x="72.39" y="66.04"/>
<element name="RETURN2" library="wirepad" package="3,17/1,1" value="" x="47.3075" y="66.04"/>
<element name="RETURN3" library="wirepad" package="3,17/1,1" value="" x="22.86" y="66.04"/>
<element name="X1" library="con-molex" package="22-23-2031" value="22-23-2031" x="20.32" y="80.01" rot="MR90">
<attribute name="MPN" value="22-23-2031" x="20.32" y="80.01" size="1.778" layer="28" rot="MR90" display="off"/>
<attribute name="OC_NEWARK" value="30C0862" x="20.32" y="80.01" size="1.778" layer="28" rot="MR90" display="off"/>
<attribute name="MF" value="MOLEX" x="20.32" y="80.01" size="1.778" layer="28" rot="MR90" display="off"/>
<attribute name="OC_FARNELL" value="1462950" x="20.32" y="80.01" size="1.778" layer="28" rot="MR90" display="off"/>
</element>
<element name="C1" library="rcl" package="C0805" value="100n" x="66.04" y="72.39"/>
<element name="C2" library="rcl" package="C0805" value="100n" x="72.7075" y="85.09"/>
<element name="C3" library="rcl" package="C0805" value="100n" x="42.2275" y="72.39"/>
<element name="C4" library="rcl" package="C0805" value="100n" x="46.99" y="85.09" rot="R180"/>
</elements>
<signals>
<signal name="GND">
<contactref element="IC1" pad="8"/>
<contactref element="IC2" pad="8"/>
<contactref element="X1" pad="2"/>
<contactref element="C10" pad="-"/>
<contactref element="C12" pad="+"/>
<contactref element="C13" pad="1"/>
<contactref element="C14" pad="1"/>
<contactref element="IC1" pad="6"/>
<contactref element="IC2" pad="6"/>
<contactref element="C1" pad="1"/>
<contactref element="C2" pad="2"/>
<contactref element="C3" pad="1"/>
<contactref element="C4" pad="2"/>
<wire x1="42.6466" y1="76.835" x2="41.275" y2="76.835" width="0.4064" layer="1"/>
<wire x1="41.275" y1="76.835" x2="40.64" y2="76.2" width="0.4064" layer="1"/>
<wire x1="73.6575" y1="85.09" x2="73.34" y2="86.3625" width="0.4064" layer="1"/>
<wire x1="73.34" y1="86.3625" x2="71.755" y2="87.9475" width="0.4064" layer="1"/>
<wire x1="71.755" y1="87.9475" x2="20.955" y2="87.9475" width="0.4064" layer="1"/>
<wire x1="20.955" y1="87.9475" x2="18.7325" y2="85.725" width="0.4064" layer="1"/>
<wire x1="18.7325" y1="85.725" x2="18.7325" y2="85.1775" width="0.4064" layer="1"/>
<wire x1="18.7325" y1="85.1775" x2="18.82" y2="85.09" width="0.4064" layer="1"/>
<wire x1="20.32" y1="80.01" x2="22.86" y2="80.01" width="0.4064" layer="1"/>
<wire x1="22.86" y1="80.01" x2="23.495" y2="79.375" width="0.4064" layer="1"/>
<wire x1="23.495" y1="79.375" x2="23.495" y2="76.605" width="0.4064" layer="1"/>
<wire x1="23.495" y1="76.605" x2="21.82" y2="74.93" width="0.4064" layer="1"/>
<wire x1="73.6575" y1="85.09" x2="96.84" y2="85.09" width="0.4064" layer="1"/>
<wire x1="96.84" y1="85.09" x2="98.4275" y2="83.5025" width="0.4064" layer="1"/>
<wire x1="100.3275" y1="75.2475" x2="100.3275" y2="77.79" width="0.4064" layer="1"/>
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<wire x1="99.3775" y1="78.74" x2="98.7425" y2="80.965" width="0.4064" layer="1"/>
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<via x="64.135" y="68.2625" extent="1-16" drill="0.8" diameter="1.2" shape="square"/>
<wire x1="64.135" y1="68.2625" x2="61.9125" y2="68.2625" width="0.4064" layer="16"/>
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<via x="44.7675" y="67.945" extent="1-16" drill="0.8" diameter="1.2" shape="square"/>
<wire x1="44.7675" y1="67.945" x2="44.7675" y2="68.2625" width="0.4064" layer="1"/>
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<via x="100.0125" y="68.2625" extent="1-16" drill="0.8" diameter="1.2" shape="square"/>
<wire x1="100.0125" y1="68.2625" x2="100.0125" y2="74.9325" width="0.4064" layer="1"/>
<wire x1="100.0125" y1="74.9325" x2="100.3275" y2="75.2475" width="0.4064" layer="1"/>
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</signal>
<signal name="N$10">
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<signal name="N$17">
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<signal name="N$18">
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<signal name="N$19">
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<signal name="N$1">
<contactref element="IC1" pad="12"/>
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</signal>
<signal name="N$4">
<contactref element="IC1" pad="2"/>
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</signal>
<signal name="N$5">
<contactref element="IC1" pad="5"/>
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</signal>
<signal name="N$7">
<contactref element="IC2" pad="12"/>
<contactref element="RETURN1" pad="1"/>
<wire x1="72.39" y1="66.04" x2="69.85" y2="66.04" width="0.4064" layer="1"/>
<wire x1="69.85" y1="66.04" x2="65.7225" y2="61.9125" width="0.4064" layer="1"/>
<wire x1="65.7225" y1="61.9125" x2="54.61" y2="61.9125" width="0.4064" layer="1"/>
<wire x1="54.61" y1="61.9125" x2="53.0225" y2="63.5" width="0.4064" layer="1"/>
<wire x1="53.0225" y1="63.5" x2="53.0225" y2="73.025" width="0.4064" layer="1"/>
<wire x1="53.0225" y1="73.025" x2="54.2925" y2="74.295" width="0.4064" layer="1"/>
<wire x1="54.2925" y1="74.295" x2="54.2925" y2="76.5175" width="0.4064" layer="1"/>
<wire x1="54.2925" y1="76.5175" x2="52.705" y2="78.105" width="0.4064" layer="1"/>
<wire x1="52.705" y1="78.105" x2="48.7934" y2="78.105" width="0.4064" layer="1"/>
</signal>
<signal name="N$11">
<contactref element="IC2" pad="2"/>
<contactref element="RETURN2" pad="1"/>
<wire x1="47.3075" y1="66.04" x2="47.3075" y2="72.0725" width="0.4064" layer="1"/>
<wire x1="47.3075" y1="72.0725" x2="45.72" y2="73.66" width="0.4064" layer="1"/>
<wire x1="45.72" y1="73.66" x2="45.72" y2="75.565" width="0.4064" layer="1"/>
<wire x1="45.72" y1="75.565" x2="44.45" y2="77.1525" width="0.4064" layer="1"/>
<wire x1="44.45" y1="77.1525" x2="44.45" y2="81.28" width="0.4064" layer="1"/>
<wire x1="44.45" y1="81.28" x2="43.815" y2="81.915" width="0.4064" layer="1"/>
<wire x1="43.815" y1="81.915" x2="42.6466" y2="81.915" width="0.4064" layer="1"/>
</signal>
<signal name="N$12">
<contactref element="IC2" pad="5"/>
<contactref element="RETURN3" pad="1"/>
<wire x1="42.6466" y1="78.105" x2="31.75" y2="78.105" width="0.4064" layer="1"/>
<wire x1="31.75" y1="78.105" x2="22.86" y2="69.215" width="0.4064" layer="1"/>
<wire x1="22.86" y1="69.215" x2="22.86" y2="66.04" width="0.4064" layer="1"/>
</signal>
<signal name="N$13">
<contactref element="IC1" pad="13"/>
<contactref element="IC2" pad="13"/>
<wire x1="48.7934" y1="79.375" x2="53.975" y2="79.375" width="0.4064" layer="1"/>
<wire x1="53.975" y1="79.375" x2="55.245" y2="78.105" width="0.4064" layer="1"/>
<wire x1="55.245" y1="78.105" x2="55.245" y2="68.8975" width="0.4064" layer="1"/>
<wire x1="55.245" y1="68.8975" x2="53.975" y2="67.6275" width="0.4064" layer="1"/>
<wire x1="53.975" y1="67.6275" x2="53.975" y2="64.77" width="0.4064" layer="1"/>
<wire x1="53.975" y1="64.77" x2="54.9275" y2="63.8175" width="0.4064" layer="1"/>
<wire x1="54.9275" y1="63.8175" x2="64.135" y2="63.8175" width="0.4064" layer="1"/>
<via x="64.135" y="63.8175" extent="1-16" drill="0.8" diameter="1.2" shape="square"/>
<wire x1="64.135" y1="63.8175" x2="65.0875" y2="63.8175" width="0.4064" layer="16"/>
<wire x1="65.0875" y1="63.8175" x2="72.7075" y2="71.4375" width="0.4064" layer="16"/>
<wire x1="72.7075" y1="71.4375" x2="77.47" y2="71.4375" width="0.4064" layer="16"/>
<wire x1="77.47" y1="71.4375" x2="81.915" y2="75.8825" width="0.4064" layer="16"/>
<via x="81.915" y="75.8825" extent="1-16" drill="0.8" diameter="1.2" shape="square"/>
<wire x1="81.915" y1="75.8825" x2="81.915" y2="77.7875" width="0.4064" layer="1"/>
<wire x1="81.915" y1="77.7875" x2="80.3275" y2="79.375" width="0.4064" layer="1"/>
<wire x1="80.3275" y1="79.375" x2="71.6534" y2="79.375" width="0.4064" layer="1"/>
</signal>
<signal name="N$14">
<contactref element="IC1" pad="1"/>
<contactref element="IC2" pad="1"/>
<wire x1="65.5066" y1="83.185" x2="59.69" y2="83.185" width="0.4064" layer="1"/>
<wire x1="59.69" y1="83.185" x2="55.88" y2="86.995" width="0.4064" layer="1"/>
<wire x1="55.88" y1="86.995" x2="41.91" y2="86.995" width="0.4064" layer="1"/>
<wire x1="41.91" y1="86.995" x2="40.005" y2="85.09" width="0.4064" layer="1"/>
<wire x1="40.005" y1="85.09" x2="40.005" y2="83.82" width="0.4064" layer="1"/>
<wire x1="40.005" y1="83.82" x2="40.64" y2="83.185" width="0.4064" layer="1"/>
<wire x1="40.64" y1="83.185" x2="42.6466" y2="83.185" width="0.4064" layer="1"/>
</signal>
<signal name="N$15">
<contactref element="IC1" pad="3"/>
<contactref element="IC2" pad="3"/>
<wire x1="42.6466" y1="80.645" x2="40.005" y2="80.645" width="0.4064" layer="1"/>
<via x="40.005" y="80.645" extent="1-16" drill="0.8" diameter="1.2" shape="square"/>
<wire x1="40.005" y1="80.645" x2="61.2775" y2="80.645" width="0.4064" layer="16"/>
<via x="61.2775" y="80.645" extent="1-16" drill="0.8" diameter="1.2" shape="square"/>
<wire x1="61.2775" y1="80.645" x2="65.5066" y2="80.645" width="0.4064" layer="1"/>
</signal>
</signals>
</board>
</drawing>
</eagle>
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#---------------------------------------------------------------------------------------------
# MAKEFILE: SK911 Waveshaper
#
# Part of the Synkie Project: www.synkie.net
#
# © 2017 Michael Egger, Licensed under GNU GPLv3
#
#--------------------------------------------------------------------------------------------
# Configure the following variables according to your AVR.
# Program the device with
# make fuse # to set the clock generator, boot section size etc.
# make flash # to load the boot loader into flash
# make lock # to protect the boot loader from overwriting
# make disablereset # for ATtiny85 target - to use external reset line for IO (CAUTION: this is not easy to enable again, see README)
F_CPU = 20000000
DEVICE = atmega88
PROGRAMMER = -c usbasp -P usb
AVRDUDE = avrdude $(PROGRAMMER) -p $(DEVICE)
# Choose your favorite programmer and interface above.
FUSEOPT = -U lfuse:w:0xfe:m -U hfuse:w:0xdf:m -U efuse:w:0xf9:m
COMPILE = avr-gcc -Wall -Os -I. -mmcu=$(DEVICE) -DF_CPU=$(F_CPU)#-DDEBUG_LEVEL=2
# NEVER compile the final product with debugging! Any debug output will
# distort timing so that the specs can't be met.
OBJECTS = build/main.o
# symbolic targets:
all: build/main.hex
build:
mkdir build
build/%.o: %.c build
$(COMPILE) -c $< -o $@
flash: all
$(AVRDUDE) -U flash:w:build/main.hex:i
clean:
rm -rf build
# file targets:
build/main.bin: $(OBJECTS)
$(COMPILE) -o $@ $(OBJECTS)
build/main.hex: build/main.bin
rm -f $@ build/main.eep.hex
avr-objcopy -j .text -j .data -O ihex $< $@
avr-size $@
disasm: main.bin
avr-objdump -d main.bin
cpp:
$(COMPILE) -E main.c
fuse:
$(AVRDUDE) $(FUSEOPT)
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//---------------------------------------------------------------------------------------------
// SK720 8 Step Sequencer ATMEGA88
//
//
//
// Part of the Synkie Project: www.synkie.net
//
// © 2017 Michael Egger, Licensed under GNU GPLv3
//
//--------------------------------------------------------------------------------------------
// ==============================================================================
// includes
// ------------------------------------------------------------------------------
// AVR Libc (see http://www.nongnu.org/avr-libc/)
#include <avr/io.h> // include I/O definitions (port names, pin names, etc)
#include <avr/wdt.h> // include watchdog timer support
#include <avr/interrupt.h> // include interrupt support
// ==============================================================================
// Globals
// ------------------------------------------------------------------------------
// ==============================================================================
// Functions
// ------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
// Init
// ------------------------------------------------------------------------------
void init (void) {
//PORTB: ODD/even input, SPI
PORTB = (1 << PC0); //pull up sync in??
//PORTC
DDRC = (1 << PC2) | (1 << PC1) | (1 << PC0); // Address Output
PORTC = (1 << PC4) | (1 << PC3); // pullup for trigger & reset inputs
//PORTD: Muxes
DDRD = 0xff;
// Pin change Interrupts:
// Trigger on PCINT11
// Reset on PCINT12
// Odd/EVEN on PCINT0
PCICR = (1 << PCIE1) | (1 << PCIE0);
PCMSK1 = (1 << PCINT13);
PCMSK0 = (1 << PCINT12);
// ------------------ ADC
//"By default, the successive approximation circuitry requires an input clock frequency between 50kHz and 200kHz to get maximum resolution"
// "A normal conversion takes 13 ADC clock cycles. The first conversion after the ADC is switched "
// Max 200kHz @ 20 MHz -> >1700 clk cycles... to slow for 16khz sampling
ADCSRA = (1 << ADEN | 1 << ADATE | 1 << ADIE); // Enable ADC
ADCSRA |= (1 << ADPS2) | (1 << ADPS1); // prescaler 64
ADMUX = (1 << ADLAR); // we're only reading 8bits, so left adjust result
ADCSRB = (1 << ADTS1) | (1 << ADTS0); // Trigger ADC on Timer 0 COMPA
ADCSRA |= (1 << ADSC); // Start Conversion
// Timer 1 : speed of reading back samples -> output frequency
//
OCR1AL = 0xdf;
TCCR1A = ( 1 << COM1A0 ); // Toggle OC1A on compare match,
TCCR1B = ( 1 << WGM12 | 1 << CS10); // CTC Mode, no prescaler @20mhz / 256 -> max 78.125khz sampling rate
TIMSK1 = (1 << OCIE1A);
wdt_enable(WDTO_30MS); // enable watchdog timer
sei();
}
// ------------------------------------------------------------------------------
// odd/even - vertical blanking
// on one field sample cv, on other video
ISR (PCINT0_vect) {
line_idx = 0;
if (PINB & (1 << PB2)) {
if (PINB & (1 << PB3)) {
do_sample_video = 1;
ADCSRA |= (1 << ADPS2) | (1 << ADPS1); // prescaler 64
ADMUX = (1 << ADLAR); // adc0
}
} else {
ADCSRA |= (1 << ADPS2) | (1 << ADPS1) | (1 << ADPS1); // prescaler 128 for 10bit resolution
ADMUX = (1 << ADLAR) | 1;
do_sample_video = 0;
}
if (PINC & (1 << PC3)) {
fast_mode = 1;
} else {
fast_mode = 0;
}
if (PINB & (1 << PB0)) {
ramp_input = 0;
TCCR1B |= (1 << CS10); // run with no prescaler
} else {
ramp_input = 1;
TCCR1B &= ~(1 << CS10); //stop timer
}
}
// ------------------------------------------------------------------------------
// H-Sync
ISR (PCINT1_vect) {
// Start Timer -> Pulse delay
OCR0A = x_pos;
TCCR0B |= ( 1 << CS01 ); // clk/8 prescaler -> start timer
line_idx++;
}
// ------------------------------------------------------------------------------
// Pulse Start
ISR (TIMER0_COMPA_vect) {
PORTC |= (1 << 4);
TCCR0B &= ~( 1 << CS01 ); // stop timer - adc is started automatically by interrupt
}
// ------------------------------------------------------------------------------
// ADC complete interrupt
ISR (ADC_vect) {
PORTC &= ~(1 << 4); //stop pulseout
if (do_sample_video) {
if (line_idx > 35) {
if (line_idx < 292) {
table[line_idx - 36] = ADCH;
}
}
} else {
if (line_idx == 50) {
if (ramp_input) {
cv_input = ADCH;
PORTD = table[cv_input];
} else {
cv_input = (ADCL | ADCH << 2); // Left adjusted ADC result
cv_input = 1024 - cv_input;
cv_input = cv_input + 20; // keep minimum 20 clks -> 1MHZ overflow / 256 Table size -> 3.9kHz fastest
if (!fast_mode) {
cv_input *= 16;
}
OCR1AL = (unsigned char)cv_input;
OCR1AH = (unsigned char)(cv_input >> 8);
}
ADCSRA |= (1 << ADPS2) | (1 << ADPS1); // prescaler 64
ADMUX = (1 << ADLAR) | 2; // adc02
} else if (line_idx == 120) {
cv_input = ADCH;
cv_input /= 2;
if (cv_input > 1) { // only if there seems to be signal
x_pos = cv_input + 10;
}
ADCSRA |= (1 << ADPS2) | (1 << ADPS1); // prescaler 64
ADMUX = (1 << ADLAR) ; // adc0
}
}
}
// ------------------------------------------------------------------------------
// Timer 1 Overflow: output next sample
ISR (TIMER1_COMPA_vect) {
PORTD = table[table_read_idx++];
}
// ==============================================================================
// main
// ------------------------------------------------------------------------------
int main (void) {
init();
while(1) {
wdt_reset();
}
return 0;
}
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#---------------------------------------------------------------------------------------------
# MAKEFILE: SK911 Waveshaper
#
# Part of the Synkie Project: www.synkie.net
#
# © 2017 Michael Egger, Licensed under GNU GPLv3
#
#--------------------------------------------------------------------------------------------
# Configure the following variables according to your AVR.
# Program the device with
# make fuse # to set the clock generator, boot section size etc.
# make flash # to load the boot loader into flash
# make lock # to protect the boot loader from overwriting
# make disablereset # for ATtiny85 target - to use external reset line for IO (CAUTION: this is not easy to enable again, see README)
F_CPU = 20000000
DEVICE = atmega88
PROGRAMMER = -c usbasp -P usb
AVRDUDE = avrdude $(PROGRAMMER) -p $(DEVICE)
# Choose your favorite programmer and interface above.
FUSEOPT = -U lfuse:w:0xfe:m -U hfuse:w:0xdf:m -U efuse:w:0xf9:m
COMPILE = avr-gcc -Wall -Os -I. -mmcu=$(DEVICE) -DF_CPU=$(F_CPU)#-DDEBUG_LEVEL=2
# NEVER compile the final product with debugging! Any debug output will
# distort timing so that the specs can't be met.
OBJECTS = build/main.o
# symbolic targets:
all: build/main.hex
build:
mkdir build
build/%.o: %.c build
$(COMPILE) -c $< -o $@
flash: all
$(AVRDUDE) -U flash:w:build/main.hex:i
clean:
rm -rf build
# file targets:
build/main.bin: $(OBJECTS)
$(COMPILE) -o $@ $(OBJECTS)
build/main.hex: build/main.bin
rm -f $@ build/main.eep.hex
avr-objcopy -j .text -j .data -O ihex $< $@
avr-size $@
disasm: main.bin
avr-objdump -d main.bin
cpp:
$(COMPILE) -E main.c
fuse:
$(AVRDUDE) $(FUSEOPT)
+213
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//---------------------------------------------------------------------------------------------
// SK910 Waveshaper ATMEGA88
//
// Sample one vertical "line" of video as a wave and play it back at any frequency
//
// Part of the Synkie Project: www.synkie.net
//
// © 2017 Michael Egger, Licensed under GNU GPLv3
//
//--------------------------------------------------------------------------------------------
// ==============================================================================
// includes
// ------------------------------------------------------------------------------
// AVR Libc (see http://www.nongnu.org/avr-libc/)
#include <avr/io.h> // include I/O definitions (port names, pin names, etc)
#include <avr/wdt.h> // include watchdog timer support
#include <avr/interrupt.h> // include interrupt support
// ==============================================================================
// Globals
// ------------------------------------------------------------------------------
unsigned int line_idx;
unsigned char x_pos;
// default sine wave, so you can use this module as a sine oscillator by tying PB3 to ground....
unsigned char table[256] = {0x80,0x83,0x86,0x89,0x8c,0x8f,0x92,0x95,0x98,0x9b,0x9e,0xa2,0xa5,0xa7,0xaa,0xad,0xb0,0xb3,0xb6,0xb9,0xbc,0xbe,0xc1,0xc4,0xc6,0xc9,0xcb,0xce,0xd0,0xd3,0xd5,0xd7,0xda,0xdc,0xde,0xe0,0xe2,0xe4,0xe6,0xe8,0xea,0xeb,0xed,0xee,0xf0,0xf1,0xf3,0xf4,0xf5,0xf6,0xf8,0xf9,0xfa,0xfa,0xfb,0xfc,0xfd,0xfd,0xfe,0xfe,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xfe,0xfe,0xfd,0xfd,0xfc,0xfb,0xfa,0xfa,0xf9,0xf8,0xf6,0xf5,0xf4,0xf3,0xf1,0xf0,0xee,0xed,0xeb,0xea,0xe8,0xe6,0xe4,0xe2,0xe0,0xde,0xdc,0xda,0xd7,0xd5,0xd3,0xd0,0xce,0xcb,0xc9,0xc6,0xc4,0xc1,0xbe,0xbc,0xb9,0xb6,0xb3,0xb0,0xad,0xaa,0xa7,0xa5,0xa2,0x9e,0x9b,0x98,0x95,0x92,0x8f,0x8c,0x89,0x86,0x83,0x80,0x7c,0x79,0x76,0x73,0x70,0x6d,0x6a,0x67,0x64,0x61,0x5d,0x5a,0x58,0x55,0x52,0x4f,0x4c,0x49,0x46,0x43,0x41,0x3e,0x3b,0x39,0x36,0x34,0x31,0x2f,0x2c,0x2a,0x28,0x25,0x23,0x21,0x1f,0x1d,0x1b,0x19,0x17,0x15,0x14,0x12,0x11,0xf,0xe,0xc,0xb,0xa,0x9,0x7,0x6,0x5,0x5,0x4,0x3,0x2,0x2,0x1,0x1,0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x1,0x1,0x1,0x2,0x2,0x3,0x4,0x5,0x5,0x6,0x7,0x9,0xa,0xb,0xc,0xe,0xf,0x11,0x12,0x14,0x15,0x17,0x19,0x1b,0x1d,0x1f,0x21,0x23,0x25,0x28,0x2a,0x2c,0x2f,0x31,0x34,0x36,0x39,0x3b,0x3e,0x41,0x43,0x46,0x49,0x4c,0x4f,0x52,0x55,0x58,0x5a,0x5d,0x61,0x64,0x67,0x6a,0x6d,0x70,0x73,0x76,0x79,0x7c};
unsigned char table_read_idx;
unsigned char do_sample_video;
unsigned int cv_input;
unsigned char fast_mode;
unsigned char ramp_input;
// ==============================================================================
// Functions
// ------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
// Init
// ------------------------------------------------------------------------------
void init (void) {
DDRC = (1 << 4); //pulse out
PORTC |= (1 << PC3); // pullup for fast/slow, switch
PORTB |= (1 << PB3); // pullup for rec switch
PORTB |= (1 << PB0); // pullup for osc/ramp, switch
DDRD = 0xFF; // R2R Ladder DAC
// Pin change Interrupts
// HSYNC on PC5 = PCINT13
// Odd/EVEN on PB2 = PCINT2
PCICR = (1 << PCIE1) | (1 << PCIE0);
PCMSK1 = (1 << PCINT13);
PCMSK0 = (1 << PCINT2);
// Timer 0 : H-Sync Pulse Delay max 64us @ 20Mhz = 1280 Clock Cycles
// Prescaler 8 -> OCR0 0-160 (better something like 10-150...?)
x_pos = 150;
TCCR0A = 0; // Normal mode, no OC= pins connected
TIMSK0 = ( 1 << OCIE0A); // Output compare interrupt enabled
// Timer still stopped
// ------------------ ADC
//"By default, the successive approximation circuitry requires an input clock frequency between 50kHz and 200kHz to get maximum resolution"
// "A normal conversion takes 13 ADC clock cycles. The first conversion after the ADC is switched "
// Max 200kHz @ 20 MHz -> >1700 clk cycles... to slow for 16khz sampling
ADCSRA = (1 << ADEN | 1 << ADATE | 1 << ADIE); // Enable ADC
ADCSRA |= (1 << ADPS2) | (1 << ADPS1); // prescaler 64
ADMUX = (1 << ADLAR); // we're only reading 8bits, so left adjust result
ADCSRB = (1 << ADTS1) | (1 << ADTS0); // Trigger ADC on Timer 0 COMPA
ADCSRA |= (1 << ADSC); // Start Conversion
// Timer 1 : speed of reading back samples -> output frequency
//
OCR1AL = 0xdf;
TCCR1A = ( 1 << COM1A0 ); // Toggle OC1A on compare match,
TCCR1B = ( 1 << WGM12 | 1 << CS10); // CTC Mode, no prescaler @20mhz / 256 -> max 78.125khz sampling rate
TIMSK1 = (1 << OCIE1A);
wdt_enable(WDTO_30MS); // enable watchdog timer
sei();
}
// ------------------------------------------------------------------------------
// odd/even - vertical blanking
// on one field sample cv, on other video
ISR (PCINT0_vect) {
line_idx = 0;
if (PINB & (1 << PB2)) {
if (PINB & (1 << PB3)) {
do_sample_video = 1;
ADCSRA |= (1 << ADPS2) | (1 << ADPS1); // prescaler 64
ADMUX = (1 << ADLAR); // adc0
}
} else {
ADCSRA |= (1 << ADPS2) | (1 << ADPS1) | (1 << ADPS1); // prescaler 128 for 10bit resolution
ADMUX = (1 << ADLAR) | 1;
do_sample_video = 0;
}
if (PINC & (1 << PC3)) {
fast_mode = 1;
} else {
fast_mode = 0;
}
if (PINB & (1 << PB0)) {
ramp_input = 0;
TCCR1B |= (1 << CS10); // run with no prescaler
} else {
ramp_input = 1;
TCCR1B &= ~(1 << CS10); //stop timer
}
}
// ------------------------------------------------------------------------------
// H-Sync
ISR (PCINT1_vect) {
// Start Timer -> Pulse delay
OCR0A = x_pos;
TCCR0B |= ( 1 << CS01 ); // clk/8 prescaler -> start timer
line_idx++;
}
// ------------------------------------------------------------------------------
// Pulse Start
ISR (TIMER0_COMPA_vect) {
PORTC |= (1 << 4);
TCCR0B &= ~( 1 << CS01 ); // stop timer - adc is started automatically by interrupt
}
// ------------------------------------------------------------------------------
// ADC complete interrupt
ISR (ADC_vect) {
PORTC &= ~(1 << 4); //stop pulseout
if (do_sample_video) {
if (line_idx > 35) {
if (line_idx < 292) {
table[line_idx - 36] = ADCH;
}
}
} else {
if (line_idx == 50) {
if (ramp_input) {
cv_input = ADCH;
PORTD = table[cv_input];
} else {
cv_input = (ADCL | ADCH << 2); // Left adjusted ADC result
cv_input = 1024 - cv_input;
cv_input = cv_input + 20; // keep minimum 20 clks -> 1MHZ overflow / 256 Table size -> 3.9kHz fastest
if (!fast_mode) {
cv_input *= 16;
}
OCR1AL = (unsigned char)cv_input;
OCR1AH = (unsigned char)(cv_input >> 8);
}
ADCSRA |= (1 << ADPS2) | (1 << ADPS1); // prescaler 64
ADMUX = (1 << ADLAR) | 2; // adc02
} else if (line_idx == 120) {
cv_input = ADCH;
cv_input /= 2;
if (cv_input > 1) { // only if there seems to be signal
x_pos = cv_input + 10;
}
ADCSRA |= (1 << ADPS2) | (1 << ADPS1); // prescaler 64
ADMUX = (1 << ADLAR) ; // adc0
}
}
}
// ------------------------------------------------------------------------------
// Timer 1 Overflow: output next sample
ISR (TIMER1_COMPA_vect) {
PORTD = table[table_read_idx++];
}
// ==============================================================================
// main
// ------------------------------------------------------------------------------
int main (void) {
init();
while(1) {
wdt_reset();
}
return 0;
}
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff