From a706023bbfa8e3236a39a677c7d581fa3b97c08b Mon Sep 17 00:00:00 2001
From: veejay <>
Date: Wed, 6 Sep 2023 22:03:17 +0200
Subject: [PATCH] Add cache line size detection on arm

---
 veejay-current/veejay-core/libvjmem/vj-x86.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/veejay-current/veejay-core/libvjmem/vj-x86.c b/veejay-current/veejay-core/libvjmem/vj-x86.c
index 5296ceaa..c95803ba 100644
--- a/veejay-current/veejay-core/libvjmem/vj-x86.c
+++ b/veejay-current/veejay-core/libvjmem/vj-x86.c
@@ -71,6 +71,17 @@ static int has_cpuid(void)
 	return 0;
 }
 
+#ifdef HAVE_ARM
+static int get_cache_line_size() {
+	int cache_line_size;
+
+    asm volatile("mrs %0, ctr_el0" : "=r"(cache_line_size));
+    cache_line_size &= 0xFF; 
+
+    return cache_line_size;
+}
+#endif
+#if defined(ARCH_X86_64) || defined(ARCH_X86)
 // copied from Mplayer (want to have cache line size detection ;) )
 static void do_cpuid(unsigned int ax, unsigned int *p)
 {
@@ -110,6 +121,7 @@ static int	get_cache_line_size()
 	}
 	return ret;
 }
+#endif
 
 int	cpu_cache_size()
 {
@@ -128,6 +140,9 @@ void vj_mem_init(void)
 #endif
 #ifdef ARCH_X86_64
 	CACHE_LINE_SIZE = get_cache_line_size();
+#endif
+#if defined (HAVE_ARM)
+	CACHE_LINE_SIZE = get_cache_line_size();
 #endif
 	if(MEM_ALIGNMENT_SIZE == 0)
 		MEM_ALIGNMENT_SIZE = getpagesize();