lavu: add/use flag for RISC-V Zba extension

The code was blindly assuming that Zbb or V implied Zba. While the
earlier is practically always true, the later broke some QEMU setups,
as V was introduced earlier than Zba.
This commit is contained in:
Rémi Denis-Courmont
2023-07-16 15:08:08 +03:00
parent 98e4dd39c5
commit b6585eb04c
14 changed files with 53 additions and 37 deletions

View File

@@ -32,7 +32,7 @@ av_cold void ff_fixed_dsp_init_riscv(AVFixedDSPContext *fdsp)
#if HAVE_RVV
int flags = av_get_cpu_flags();
if (flags & AV_CPU_FLAG_RVV_I32)
if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR))
fdsp->butterflies_fixed = ff_butterflies_fixed_rvv;
#endif
}