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lavu: add/use flag for RISC-V Zba extension

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The code was blindly assuming that Zbb or V implied Zba. While the
earlier is practically always true, the later broke some QEMU setups,
as V was introduced earlier than Zba.
This commit is contained in:
Rémi Denis-Courmont
2023-07-16 15:08:08 +03:00
parent 98e4dd39c5
commit b6585eb04c
14 changed files with 53 additions and 37 deletions
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30
libavutil/riscv/float_dsp_init.c
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@@ -52,21 +52,23 @@ av_cold void ff_float_dsp_init_riscv(AVFloatDSPContext *fdsp)
#if HAVE_RVV
int flags = av_get_cpu_flags();
if (flags & AV_CPU_FLAG_RVV_F32) {
fdsp->vector_fmul = ff_vector_fmul_rvv;
fdsp->vector_fmac_scalar = ff_vector_fmac_scalar_rvv;
fdsp->vector_fmul_scalar = ff_vector_fmul_scalar_rvv;
fdsp->vector_fmul_window = ff_vector_fmul_window_rvv;
fdsp->vector_fmul_add = ff_vector_fmul_add_rvv;
fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_rvv;
fdsp->butterflies_float = ff_butterflies_float_rvv;
fdsp->scalarproduct_float = ff_scalarproduct_float_rvv;
}
if (flags & AV_CPU_FLAG_RVB_ADDR) {
if (flags & AV_CPU_FLAG_RVV_F32) {
fdsp->vector_fmul = ff_vector_fmul_rvv;
fdsp->vector_fmac_scalar = ff_vector_fmac_scalar_rvv;
fdsp->vector_fmul_scalar = ff_vector_fmul_scalar_rvv;
fdsp->vector_fmul_window = ff_vector_fmul_window_rvv;
fdsp->vector_fmul_add = ff_vector_fmul_add_rvv;
fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_rvv;
fdsp->butterflies_float = ff_butterflies_float_rvv;
fdsp->scalarproduct_float = ff_scalarproduct_float_rvv;
}
if (flags & AV_CPU_FLAG_RVV_F64) {
fdsp->vector_dmul = ff_vector_dmul_rvv;
fdsp->vector_dmac_scalar = ff_vector_dmac_scalar_rvv;
fdsp->vector_dmul_scalar = ff_vector_dmul_scalar_rvv;
if (flags & AV_CPU_FLAG_RVV_F64) {
fdsp->vector_dmul = ff_vector_dmul_rvv;
fdsp->vector_dmac_scalar = ff_vector_dmac_scalar_rvv;
fdsp->vector_dmul_scalar = ff_vector_dmul_scalar_rvv;
}
}
#endif
}