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https://github.com/game-stop/veejay.git
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162 lines
3.6 KiB
C
162 lines
3.6 KiB
C
/*
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* cpu_accel.c
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* Copyright (C) 1999-2000 Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
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*
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* This file is part of mpeg2dec, a free MPEG-2 video stream decoder.
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*
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* mpeg2dec is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* mpeg2dec is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <config.h>
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#include <stdio.h>
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#include <signal.h>
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#include <setjmp.h>
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#include "cpu_accel.h"
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#ifdef HAVE_X86CPU
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#include "mjpeg_types.h"
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/* Some miscelaneous stuff to allow checking whether SSE instructions cause
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illegal instruction errors.
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*/
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static sigjmp_buf sigill_recover;
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static RETSIGTYPE sigillhandler(int sig )
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{
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siglongjmp( sigill_recover, 1 );
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}
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typedef RETSIGTYPE (*__sig_t)(int);
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static int testsseill()
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{
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int illegal;
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#if defined(__CYGWIN__)
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/* SSE causes a crash on CYGWIN, apparently.
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Perhaps the wrong signal is being caught or something along
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those line ;-) or maybe SSE itself won't work...
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*/
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illegal = 1;
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#else
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__sig_t old_handler = signal( SIGILL, sigillhandler);
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if( sigsetjmp( sigill_recover, 1 ) == 0 )
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{
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asm ( "movups %xmm0, %xmm0" );
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illegal = 0;
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}
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else
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illegal = 1;
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signal( SIGILL, old_handler );
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#endif
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return illegal;
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}
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static int x86_accel (void)
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{
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int32_t eax, ebx, ecx, edx;
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int32_t AMD;
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int32_t caps;
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#define cpuid(op,eax,ebx,ecx,edx) \
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asm ("cpuid" \
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: "=a" (eax), \
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"=b" (ebx), \
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"=c" (ecx), \
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"=d" (edx) \
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: "a" (op) \
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: "cc")
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asm ("pushfl\n\t"
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"popl %0\n\t"
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"movl %0,%1\n\t"
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"xorl $0x200000,%0\n\t"
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"pushl %0\n\t"
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"popfl\n\t"
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"pushfl\n\t"
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"popl %0"
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: "=a" (eax),
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"=b" (ebx)
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:
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: "cc");
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if (eax == ebx) // no cpuid
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return 0;
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cpuid (0x00000000, eax, ebx, ecx, edx);
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if (!eax) // vendor string only
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return 0;
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AMD = (ebx == 0x68747541) && (ecx == 0x444d4163) && (edx == 0x69746e65);
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cpuid (0x00000001, eax, ebx, ecx, edx);
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if (! (edx & 0x00800000)) // no MMX
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return 0;
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caps = ACCEL_X86_MMX;
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/* If SSE capable CPU has same MMX extensions as AMD
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and then some. However, to use SSE O.S. must have signalled
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it use of FXSAVE/FXRSTOR through CR4.OSFXSR and hence FXSR (bit 24)
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here
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*/
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if ((edx & 0x02000000))
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caps = ACCEL_X86_MMX | ACCEL_X86_MMXEXT;
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if( (edx & 0x03000000) == 0x03000000 )
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{
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/* Check whether O.S. has SSE support... has to be done with
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exception 'cos those Intel morons put the relevant bit
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in a reg that is only accesible in ring 0... doh!
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*/
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if( !testsseill() )
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caps |= ACCEL_X86_SSE;
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}
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cpuid (0x80000000, eax, ebx, ecx, edx);
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if (eax < 0x80000001) // no extended capabilities
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return caps;
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cpuid (0x80000001, eax, ebx, ecx, edx);
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if (edx & 0x80000000)
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caps |= ACCEL_X86_3DNOW;
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if (AMD && (edx & 0x00400000)) // AMD MMX extensions
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{
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caps |= ACCEL_X86_MMXEXT;
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}
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return caps;
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}
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#endif
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int cpu_accel (void)
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{
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#ifdef HAVE_X86CPU
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static int got_accel = 0;
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static int accel;
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if (!got_accel) {
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got_accel = 1;
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accel = x86_accel ();
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}
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return accel;
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#else
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return 0;
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#endif
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}
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